1. Field of the Invention
The present invention generally relates to methods of directly attaching an integrated circuit (IC) device, or chip to a substrate to form a module and sealing the chip such that external materials are prevented from contaminating the IC. More particularly, a substrate is fabricated having cavities, or the like with particular dimensions such that a controlled collapse chip connect (C4) type chip can be attached and directly contact the substrate. Further, a sealing material is applied to a the substrate prior to attachment of the C4 type chip thereby providing a continuous layer of sealant material between the chip and substrate. Additionally, the present invention can be used for layer to layer attachment of substrates in fabricating a multilayer carrier, or any other application requiring the selective coating of material onto a surface.
2. Description of Related Art
Chip attach methods using C4 solder ball technology are well known in the art. Using conventional techniques, chips with C4 solder balls are aligned with a relief area (dimple, cavity, or the like) or connection pad on a substrate and pressed into place. Prior art methods maintain a defined space between the chip and the substrate, as shown by U.S. Pat. Nos. 4,940,181: 4,074,342; 4,617,730. Because of this intermediate spacing, the amount of pressure that can be applied to seat the chip onto the substrate is severely limited. It can be seen that the solder balls will be crushed, or the chip damaged when even a small amount of force exceeding the placement force is applied to the chip.
Solder balls are not exactly uniform and their dimensions may vary, from the desired 0.006 inches (6 mils), on the order of +/-0.3 mils. Thus, it can be seen that when a chip is placed onto a substrate connection pad not all of the solder balls will contact the pad i.e. some of the smaller C4s will be suspended above the contact pads. Further, conventional methods and configurations only allow limited pressure to be applied to the chip to seat it onto the substrate in order to make the required electrical connections therebetween. Of course, the solder balls could be reflowed, but this would create a permanent electrical connection and cause a great deal more time and effort to be used to rework the substrate, by removing any chips that test bad.
Conventional techniques for sealing chips attached to substrates include injecting sealant material around the periphery of the chip/substrate interface or completely coating the chip and substrate assembly with sealing material, as well as allowing sealant to flow between the substrate and chip, around the solder balls. Injecting sealant around the periphery does not provide a continuous layer of sealing material and leaves some C4 joints exposed under the chip. Coating the assembly prevents any type of rework of the substrate if, for example, one of the ICs on a substrate proves to be defective, i.e. the entire assembly will have to replaced, as opposed to a single chip. Flowing sealant between the chip and substrate necessarily requires that the chip not be placed directly adjacent the substrate, as contemplated by the present invention.
IBM TDB, "Encapsulated Solder Joint for Chip Mounting" shows a chip bonded to a substrate and sealing resin subsequently applied to the gap between the chip and the substrate. IBM TDB, "Chip Protective Coating" describes coating a chip, including solder balls, with a polyimide layer. The material is then shaved to expose the solder and the polyimide remains intermediate the solder. The polyimide layer is used to protect the chip from alpha particle absorption from the substrate. IBM TDB, "Replaceable Chip to Heat Sink Connection on Circuit Boards" uses a thermoplastic layer intermediate a chip and heat sink to compensate for differences in thermal expansion.
U.S. Pat. No. 4,604,644 shows a chip and substrate assembly with a dielectric material disposed intermediate therebetween, but only around the periphery of the chip.
Further, prior art methods do not provide any means of temporarily bonding the chip to the substrate to help compensate for the expansions and contractions of the chip with respect to the substrate, or vice versa, that occur due to differences in thermal coefficients of expansion.
It can be seen that none of the prior art methods provide a method or configuration which allow a chip to be placed in direct abutting relation with the substrate such that a sufficient amount of pressure can be applied to the chip, to ensure proper electrical connection between the chip and substrate without reflowing the C4 solder balls. Further, conventional methods do not describe placing a continuous layer of sealing material between a substrate and chip, being attached thereto, which will prevent contaminants from entering the chip and corrupting its performance. Also, prior art methods do not show providing such a sealing layer that also exhibits adhesive qualities and compensates for differences in the coefficients of thermal expansion between the chip and substrate, thereby facilitating the chip attach process.
Thus, it would be desirable to have a method and configuration which allows sufficient pressure to be applied to a chip in order to electrically connect each input/output connection point with the corresponding I/Os on the substrate, without crushing the solder balls or damaging the chip. Further, it would be advantageous to be able to apply an adhesive and sealant between the chip and substrate, to provide compensation for thermal expansion differences and seal the chip from exterior contaminants.